%
% Alpha Linux Project
% Nov 24, 1998
% Byungsoo Jung
% bsjung@alpha.secsm.org
%
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\noindent {\Huge
Alpha CPU�� Instruciton�� GAS�� ���� 
}
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{\LARGE
�Ｚ ����Ʈ���� ����� \\
������ ����� ����  \\
�� �� ��  \\

\vspace{1cm}

1998�� 11�� 24�� �ʺ� \\
}

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\section{Alpha Instruction�� �з�}
\subsection{Alpha Register�� ����}
\begin{enumerate}
\item Program Counter : 1�� PC
\item Integer Registers : 32�� R0 $\sim$ R31
\item Floating-Point Registers :32�� F0 $\sim$ F31
\item Lock Registers : 2��
\item Processor Cycle Counter (PCC) Register : 1��
\item Operation Registers :
\begin{enumerate}
	\item Memory Prefetch Registers 
	\item VAX Compatibility Register
\end{enumerate}
\end{enumerate}


\subsection{Alpha Instruction�� ����}
\begin{enumerate}
\item Memory (Mem) : �޸𸮿� ���� ���� \\
     Memory/function code (Mfc) : �޸𸮿����� �Լ� �� ���� \\
   Memory (Mem) : �޸𸮿� ���� ����
\item Branch (Bra) : �б� ����
\item Floating-Point (F-P) : �Ǽ� ����
\item Operate (Opr) : �Ϲ����� ����
\item PALcode (Pcd) : PALcode�� ���� ����
\end{enumerate}

\subsection{��ɺ� Instruction �з�}

\begin{enumerate}

\item Memory Integer Load/Store Summary \\

\begin{tabular}{|c|l|} \hline 
   Mnemonic      &    Operation \\ \hline
   LDA     &  Load Address\\ 
  LDAH   &    Load Address High\\
  LDBU   & Load Zero-Extended Byte from Memory to Register\\
  LDL    & Load Sign-Extended Longword\\
  LDL\_L  &       Load Sign-Extended Longword Locked\\
  LDQ    & Load Quadword\\
  LDQ\_L  &       Load Quadword Locked\\
  LDQ\_U  &       Load Quadword Unaligned\\
  LDWU   &  Load Zero-Extended Word from Memory to Register\\
  STB    & Store Byte\\
  STL    & Store Longword\\
   STL\_C   &    Store Longword Conditional\\
   STQ     &    Store Quadword\\
   STQ\_C   &    Store Quadword Conditional\\
   STQ\_U   &    Store Quadword Unaligned\\
   STW     &    Store Word\\ \hline
\end{tabular}

\newpage
\item  Control Instructions Summary\\

\begin{tabular}{|c|l|} \hline 
     Mnemonic     &       Operation\\ \hline
 BEQ   &  Branch if Register Equal to Zero\\
 BGE   &  Branch if Register Greater Than or Equal to Zero\\
 BGT   &  Branch if Register Greater Than Zero\\
 BLBC  &  Branch if Register Low Bit Is Clear\\
 BLBS  &  Branch if Register Low Bit Is Set\\
 BLE   &  Branch if Register Less Than or Equal to Zero\\
 BLT   &  Branch if Register Less Than Zero\\ \hline
\end{tabular}

\newpage
\item  Integer Arithmetic Instructions Summary\\

\begin{tabular}{|c|l|} \hline 
   Mnemonic       &       Operation\\ \hline 
 ADD   &  Add Quadword/Longword\\
 S4ADD &  Scaled Add by 4\\
 S8ADD &  Scaled Add by 8\\
 CMPEQ &  Compare Signed Quadword Equal\\
 CMPLT &  Compare Signed Quadword Less Than\\
 CMPLE &  Compare Signed Quadword Less Than or Equal\\
 CTLZ  &   Count leading zero\\
 CTPOP &   Count population\\
 CTTZ  &   Count trailing zero\\
 CMPULT &  Compare Unsigned Quadword Less Than\\
 CMPULE &  Compare Unsigned Quadword Less Than or Equal\\
 MUL    &  Multiply Quadword/Longword\\
 UMULH  & Multiply Quadword Unsigned High\\
 SUB    &   Subtract Quadword/Longword\\
 S4SUB  &  Scaled Subtract by 4\\
 S8SUB  &  Scaled Subtract by 8\\ \hline
\end{tabular}


\newpage
\item  Logical and Shift Instructions Summary\\

\begin{tabular}{|c|l|} \hline 
   Mnemonic       &       Operation\\ \hline 
AND  & Logical Product\\
BIC & Logical Product with Complement\\
BIS & Logical Sum (OR)\\
EQV & Logical Equivalence (XORNOT)\\
ORNOT & Logical Sum with Complement\\
XOR & Logical Difference\\
CMOVxx & Conditional Move Integer\\
SLL & Shift Left Logical\\
SRA & Shift Right Arithmetic\\
SRL & Shift Right Logical\\ \hline
\end{tabular}

\item  Byte Manipulation Instructions\\

\begin{tabular}{|c|l|} \hline 
   Mnemonic       &       Operation\\ \hline 
LDBU/LDWU & Load byte/word unaligned \\
SEXTB/SEXTW & Sign-extend byte/word \\
STB/STW & Store byte/word \\ \hline
\end{tabular}

\newpage
\item  Memory Floating-Point Instructions\\

\begin{tabular}{|c|l|c|} \hline 
   Mnemonic       &       Operation & Subset \\ \hline 
LDF & Load F\_floating & VAX\\
LDG & Load G\_floating (Load D\_floating) & VAX\\
LDS & Load S\_floating (Load Longword Integer) & Both\\
LDT & Load T\_floating (Load Quadword Integer) & Both\\
STF & Store F\_floating & VAX\\
STG & Store G\_floating (Store D\_floating) & VAX\\
STS & Store S\_floating (Store Longword Integer) & Both\\
STT & Store T\_floating (Store Quadword Integer) & Both\\ \hline
\end{tabular}

\item  Floating-Point Branch Instructions Summary\\

\begin{tabular}{|c|l|c|} \hline 
   Mnemonic       &       Operation & Subset \\ \hline 
FBEQ & Floating Branch Equal & Both\\
FBGE & Floating Branch Greater Than or Equal & Both\\
FBGT & Floating Branch Greater Than & Both\\
FBLE & Floating Branch Less Than or Equal & Both\\
FBLT & Floating Branch Less Than & Both\\
FBNE & Floating Branch Not Equal & Both\\ \hline
\end{tabular}

\item  Floating-Point Operate Instructions Summary\\

\begin{tabular}{|c|l|c|} \hline 
   Mnemonic       &       Operation & Subset \\ \hline 
CPYS & Copy Sign & Both\\
CPYSE & Copy Sign and Exponent & Both\\
CPYSN & Copy Sign Negate & Both\\
CVTLQ & Convert Longword to Quadword & Both\\
CVTQL & Convert Quadword to Longword & Both\\
FCMOVxx & Floating Conditional Move & Both\\
MF\_FPCR & Move from Floating-point Control Register & Both\\
MT\_FPCR & Move to Floating-point Control Register &Both\\
ADDF & Add F\_floating & VAX\\
ADDG & Add G\_floating & VAX\\
ADDS & Add S\_floating & IEEE\\
ADDT & Add T\_floating & IEEE\\
CMPGxx & Compare G\_floating & VAX\\
CMPTxx & Compare T\_floating & IEEE\\
CVTDG & Convert D\_floating to G\_floating & VAX\\
CVTGD & Convert G\_floating to D\_floating & VAX\\
CVTGF & Convert G\_floating to F\_floating & VAX\\
CVTGQ & Convert G\_floating to Quadword & VAX\\
CVTQF & Convert Quadword to F\_floating & VAX\\
CVTQG & Convert Quadword to G\_floating & VAX\\
CVTQS & Convert Quadword to S\_floating & IEEE\\
CVTQT & Convert Quadword to T\_floating & IEEE\\
CVTST & Convert S\_floating to T\_floating & IEEE\\
CVTTQ & Convert T\_floating to Quadword & IEEE\\
CVTTS & Convert T\_floating to S\_floating & IEEE\\
DIVF & Divide F\_floating & VAX\\
DIVG & Divide G\_floating & VAX\\
DIVS & Divide S\_floating & IEEE\\
DIVT & Divide T\_floating & IEEE\\
FTOIS & Floating-point to integer register move, S\_floating & IEEE\\
FTOIT &  Floating-point to integer register move, T\_floating & IEEE\\
ITOFF & Integer to floating-point register move, F\_floating & VAX\\
ITOFS & Integer to floating-point register move, S\_floating & IEEE\\
ITOFT & Integer to floating-point register move, T\_floating & IEEE\\
MULF & Multiply F\_floating & VAX\\
MULG & Multiply G\_floating & VAX\\
MULS & Multiply S\_floating & IEEE\\
MULT & Multiply T\_floating & IEEE\\
SQRTF & Square root F\_floating & VAX\\
SQRTG & Square root G\_floating & VAX\\
SQRTS & Square root S\_floating & IEEE\\
SQRTT & Square root T\_floating & IEEE\\
SUBF & Subtract F\_floating & VAX\\
SUBG & Subtract G\_floating & VAX\\
SUBS & Subtract S\_floating & IEEE\\
SUBT & Subtract T\_floating & IEEE\\
\end{tabular}

\item  Miscellaneous Instructions\\

\begin{tabular}{|c|l|} \hline 
   Mnemonic       &       Operation \\ \hline 
AMASK & Architecture Mask\\
CALL\_PAL & Call Privileged Architecture Library Routine\\
ECB & Evict Cache Block\\
EXCB & Exception Barrier\\
FETCH & Prefetch Data\\
FETCH\_M & Prefetch Data, Modify Intent\\
IMPLVER & Implementation Version\\
MB & Memory Barrier\\
RPCC & Read Processor Cycle Counter\\
TRAPB  & Trap Barrier\\
WH64 & Write Hint -- 64 Bytes\\
WMB & Write Memory Barrier\\ \hline
\end{tabular}

\item  VAX Compatibility Instructions\\

\begin{tabular}{|c|l|} \hline 
   Mnemonic       &       Operation \\ \hline 
RC  & Read and Clear\\
RS & Read and Set\\ \hline
\end{tabular}

\newpage
\item  Multimedia (Graphics and Video) Support\\

\begin{tabular}{|c|l|} \hline 
   Mnemonic       &       Operation \\ \hline 
MINUB8 & Vector Unsigned Byte Minimum\\
MINSB8 & Vector Signed Byte Minimum\\
MINUW4 & Vector Unsigned Word Minimum\\
MINSW4 & Vector Signed Word Minimum\\
MAXUB8 & Vector Unsigned Byte Maximum\\
MAXSB8 & Vector Signed Byte Maximum\\
MAXUW4 & Vector Unsigned Word Maximum\\
MAXSW4 & Vector Signed Word Maximum\\
PERR & Pixel Error\\
PKLB & Pack Longwords to Bytes\\
PKWB & Pack Words to Bytes\\
UNPKBL & Unpack Bytes to Longwords\\
UNPKBW & Unpack Bytes to Words\\ \hline
\end{tabular}

\end{enumerate}

\newpage

\section{GAS�� �̿��� Alpha Assembly ��� ���α׷���}

���� Alpha Instruction�� �̿��� Assembly ���α׷��� �غ���.

\subsection{������ ���}

\begin{enumerate}

\item Assembly �ڵ� �ۼ� 

���� ������ Assembly �� ����� ����� ������ ���� C����
Assembly �� ������ ���� ����̴�.

������ hello.c �̴�.
{\baselineskip =2pt
\begin{verbatim}
#include <stdio.h>

void main()
{

        printf("Hello World\n");

}
\end{verbatim}
}

������ C �ҽ����� Assembler �ҽ��� ��� ����̴�.
{\baselineskip =2pt
\begin{verbatim}
% gcc -S hello.c
\end{verbatim}
}

������ �̷��� �ؼ� ��� Assembler �ҽ��̴�.
{\baselineskip =2pt
\begin{verbatim}
        .file   1 "hello.c"
        .version        "01.01"
        .set noat
gcc2_compiled.:
__gnu_compiled_c:
.section        .rodata
        .align 3
$C32:
        .ascii "Hello World\12\0"
.text
        .align 3
        .globl main
        .ent main
main:
        ldgp $29,0($27)
main..ng:
        lda $30,-16($30)
        .frame $15,16,$26,0
        stq $26,0($30)
        stq $15,8($30)
        .mask 0x4008000,-16
        bis $30,$30,$15
        .prologue 1
        lda $16,$C32
        jsr $26,printf
        ldgp $29,0($26)
$33:
        bis $15,$15,$30
        ldq $26,0($30)
        ldq $15,8($30)
        addq $30,16,$30
        ret $31,($26),1
        .end main
        .ident  "GCC: (GNU) 2.7.2.1"
\end{verbatim}
}

\item GAS�� ������ �ϱ�

�׷��� hello.s��� assembly ������ ����� ���µ�,
 �̰��� GNU Assembler�� as�� Object ������ �����.

{\baselineskip =2pt
\begin{verbatim}
% as -o hello.obj hello.s
\end{verbatim}
}

\item ���� ���� �����

���� Loader(ld)�� ���̺귯���� ���� ���� ������ ����� �ָ� �ȴ�.
�̶� gcc�� ���������ָ� �ڵ����� ������ �˾Ƽ� ���ش�.

{\baselineskip =2pt
\begin{verbatim}
% gcc -o hello hello.o
\end{verbatim}
}

\subsection{Alpha Assembly ��� ���α׷����ϱ�}

���� C���� ������� ������ hello.s�� �����ϰ� ����� �����ν�
Alpha Assembly �� ��������.

GAS�� ���α׷��� �Ҷ� ������ ������ ���ڰ� ���� Instruction������
���� Register�� �ҽ� Register�� ���� �ʰ� Instruction �����
�ҽ� Register�� ���� Register�� ������� �Ǿ� �ִ� AT\&T ��Ÿ�Ϸ�
�Ǿ� �ִٴ� ���̴�.

\newpage

������ hello.s �̴�.

{\baselineskip =2pt
\begin{verbatim}
/* add.s
 * Alpha Assembly ���α׷��� �ǽ�
 * 1998�� 11�� 24�� ssmLUG ������
 * Copyright (c) 1998 ssmLUG
 */

$msg:
		.ascii "Hello World!\12\0"
.text
        .align 3
        .globl main
        .ent main
main:
		lda $16, $msg
		jsr $26, printf
		ret $31, ($26), 1
        .end main
\end{verbatim}
}


\end{enumerate}

\begin{thebibliography}{99}
\bibitem{1} {\bf Alpha Architecture Handbook}, Version 4, COMPAQ
\bibitem{2} {\bf GNU Pro toolkit Manual}, http://www.cygnus.com/pubs/gnupro
\bibitem{3} {\bf Jan's Linux \&  Assember HomePage}, http://bewonner.dma.be/JanW/eng.html
\end{thebibliography}

\end{document}
